CS3351 DIGITAL PRINCIPLES AND COMPUTER ORGANIZATION (DPCO)

                                                   


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     S.Santhosh (Admin) 
Important questions 
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CS3351 DIGITAL PRINCIPLES AND COMPUTER ORGANIZATION (DPCO)

Unit 1
1. K- map using gates **
2.NAND and NOR Implementations.
3. Adder , Mulitipluxer **
Unit 2 
1.minimization, state assignment, circuit implementation
2.Analysis of Clocked Sequential Circuits (ALL FF)**
3. Registers and counters**
Unit 3
1.ISA
2.Addressing Modes, Encoding of Machine Instruction
3.Interaction between Assembly and High Level Language.
                                              Unit 4
1.HAzards, data hazard and how to control **
2. Designing a Control Unit
3.Pipelining
Unit 5 
1. MEmory management, mapping and replacement techniques
2. VM,DMA,parellel and series interface

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**Very important questions are bolded and may be asked based on this topic

PART-C

1.Compulsory Questions {a case study where the student will have to read and analyse the subject }
mostly asked from unit 2, 5(OR) a situation given and you have to answer on your own

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Contact uS for more updates *These questions are expected for the exams This may or may not be asked for exams
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SYllabuS

UNIT I 
COMBINATIONAL LOGIC 
Combinational Circuits – Karnaugh Map - Analysis and Design
Procedures – Binary Adder – Subtractor- Decimal Adder - Magnitude
Comparator – Decoder – Encoder – Multiplexers – Demultiplexers.
UNIT II
 SYNCHRONOUS SEQUENTIAL LOGIC
Introduction to Sequential Circuits – Flip-Flops – operation and
excitation tables, Triggering of FF, Analysis and design of clocked
sequential circuits – Design – Moore/Mealy models, state
minimization, state assignment, circuit implementation - Registers –
Counters.
UNIT III 
COMPUTER FUNDAMENTALS
Functional Units of a Digital Computer: Von Neumann Architecture
– Operation and Operands of Computer Hardware Instruction –
Instruction Set Architecture (ISA): Memory Location, Address and
Operation – Instruction and Instruction Sequencing – Addressing
Modes, Encoding of Machine Instruction – Interaction between
Assembly and High Level Language.
UNIT IV
PROCESSOR
Instruction Execution – Building a Data Path – Designing a Control
Unit – Hardwired Control, Microprogrammed Control – Pipelining –
Data Hazard – Control Hazards.
UNIT V
 MEMORY &I/O
Memory Concepts and Hierarchy – Memory Management – Cache
Memories: Mapping and Replacement Techniques – Virtual Memory –
DMA – I/O – Accessing I/O: Parallel and Serial Interface – Interrupt I/O

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